Google has intensified the AI chip war with the launch of its seventh-generation TPU, Ironwood, and the unveiling of its next-generation architecture, TPU 8t and TPU 8i. At Cloud Next 2026, the company revealed that Ironwood delivers 4.6 petaFLOPS per chip and 42.5 exaFLOPS in a 9,216-chip superpod, underscoring its commitment to high-performance computing for AI workloads.
Splitting the Design: A New Strategy
What sets this release apart is Google's strategic decision to split the next TPU into two distinct chips: TPU 8t (Sunfish), designed by Broadcom for training workloads, and TPU 8i (Zebrafish), developed by MediaTek for inference. This move signals a significant shift in the industry’s approach to chip design, moving away from monolithic solutions to specialized architectures tailored for specific AI tasks.
Industry Implications
The split design philosophy reflects the growing complexity and specialization within AI hardware. While training chips require high throughput and memory bandwidth, inference chips prioritize efficiency and low latency. By leveraging external design partners like Broadcom and MediaTek, Google is not only accelerating development but also adapting to a more modular and flexible approach to chip architecture. This could influence competitors like NVIDIA and AMD to reconsider their own strategies in the face of such innovation.
With both chips targeting TSMC’s 2nm process and set for commercial release in late 2027, Google is positioning itself at the forefront of the next wave of AI infrastructure. The company’s approach may redefine how AI chips are designed and deployed, turning the AI chip war into a battle of design philosophies rather than raw performance alone.
